RE: [sv-bc] "Nominal" vs "by name" as the opposite of "positional"

I agree with Shalom on this.  I think Paul is stating that VHDL uses a
"by-name" convention as well.  Hardware designers think differently than
software engineers and name association and hence "by name" will be
understood.  "nominal" has no meaning for me.  

By way of introduction, my name is Tom Alsop.  A few of you know me.  I
now work for MattM and asked if I can begin actively participate in this
forum.  I have been doing HW design for Intel for over 10 years and SV
training inside Intel for over 2 years now.  Please be patient as I ramp
into your nomenclature, I promise to ask stupid questions so that I can
understand some of the issues you are discussing.  

Thanks, -Tom

-----Original Message-----
From: owner-sv-bc@server.eda.org [mailto:owner-sv-bc@server.eda.org] On
Behalf Of Bresticker, Shalom
Sent: Wednesday, August 01, 2007 10:48 AM
To: Greg Jaxon; SV_BC List
Subject: RE: [sv-bc] "Nominal" vs "by name" as the opposite of
"positional"

I don't mind a different name,  but I think 'nominal' would be cryptic.
I think some documentations use a term like 'named association'.

Shalom
 

> -----Original Message-----
> From: owner-sv-bc@server.eda.org 
> [mailto:owner-sv-bc@server.eda.org] On Behalf Of Greg Jaxon
> Sent: Wednesday, August 01, 2007 8:27 PM
> To: SV_BC List
> Subject: [sv-bc] "Nominal" vs "by name" as the opposite of 
> "positional"
> 
> Parameter and argument lists in SV accept named_ports as an 
> alternative to the positional port/argument binding convention.
> 
> In describing this, the LRM has used the term "by-name", 
> which denotes a different concept in computer science.  
> Please consider describing the .id( expr ) syntax with the 
> adjective "nominal".
> This contrasts with the familiar "positional" convention, and 
> does not connote any resemblance to Algol "by-name" argument passing.
> 
> Thanks,
> Greg Jaxon
> 
> 
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