[sv-bc] confusion in extern module and original module equivalence checking

From: Surya Pratik Saha <spsaha_at_.....>
Date: Mon Aug 06 2007 - 03:03:59 PDT
-------- Original Message --------
Subject: 	confusion in extern module and original module equivalence 
checking
Date: 	Mon, 06 Aug 2007 15:15:32 +0530
From: 	Sumay Guin <sumay@cal.interrasystems.com>
To: 	spsaha@cal.interrasystems.com



Hi,

   Consider the scenario ,

   extern module M (input enum {XX,YY} x );
   ............
   Module M ( input enum {X,Y} x);
   ............
 
  Now  According  to system verilog LRM this is an error  scenario  as 
because type of x in extern definition and actual definition for module M
  differ as the enum{X,Y} and enum{XX,YY} are different from each 
other. But Most of the Tools  passes this scenario ,though there is
  missmatch  in type for x in extern and actual definition for module 
M. Also Same things happen if we use struct or unioun datatype in place 
of enum.
  Can someone tell me what would be the right  behaviour for the above 
scenario.
 
Thanks,
Sumay
      






-- 
Regards
Surya





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