[sv-bc] Assignment compatibility after elaboration

Hi,
As per 1800 SV LRM, there are some restrictions for some complex type 
assignment like struct/enum/unpacked array, that assignment can happen 
withing two equivalent types. Considering those if we see the following 
e.g.:
1)
module bottom;
   parameter p = 1;
   typedef struct {int x; int y;} st;
   st s;
endmodule

module top;
   bottom #(2) b1();
   bottom #(3) b2();
   initial begin
      b1.s = b2.s;
   end
endmodule

Check for the assignments "b1.s = b2.s", where the struct 's' is 
declared inside the module 'bottom'. Is the assignment correct at run 
time when the design is elaborated, that means each will have separate 
master, so the struct will be different. Different simulators behave 
differently here.

I have another similar type of e.g.:
module bottom;
   parameter type pt = int;
   pt x;
endmodule

module top;
   typedef struct {int x; int y;} et;
   bottom #(et) b1();
   bottom #(et) b2();
   initial begin
      b1.x = b2.x;
   end
endmodule

Is the assignment valid or not? I have got some feedback, that the 
design is conceptually incorrect. To override "bottom" with "et" through 
"top", "et" should be visible to both "bottom" and "top", i.e. it should 
be in compilation unit scope. Though standard simulators pass the case.

Any expert comment?

-- 
Regards
Surya





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