[sv-bc] RE: [sv-ec] Query regarding overriding of parent scope semantics in child scope.

Sandeep,
 
The module constitutes a scope (the parent scope), the task constitutes
another scope which contains its own
declarations. Symbols declared in an inner scope hide symbols of the
same name declared in parent scopes.
So yes, your testcase will not generate any parser error.
 
Francoise
       '


________________________________

	From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf
Of Sandeep Dasgupta
	Sent: Wednesday, September 05, 2007 7:13 AM
	To: sv-ac@eda-stds.org; sv-bc@eda-stds.org; sv-ec@eda-stds.org
	Subject: [sv-ec] Query regarding overriding of parent scope
semantics in child scope.
	
	
	I have a query regarding the following testcase,
	
	module top;
	          typedef int  myint ;
	
	           task t1;
	               input  myint;                   
	           endtask
	endmodule
	
	The intent of the tescase is to test whether a variable with
same name in child scope can be written overriding the 
	parent scope semantics. 
	Could the above testcase be considered as a positive one.
	Also is it  necessary to report error at "input  myint;  " so as
to avoid the name space clash.
	Please convey your suggestions.
	
	Thanks And Regards,
	Sandeep Dasgupta.
	   
	
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