RE: [sv-bc] Indexed part-select of one-bit vector (11.5.1)

The claim in 11.5.1 that the msb_expr "shall address a more significant
bit" that the lsb_expr in

   vect[msb_expr:lsb_expr]
   
is also incorrect for one-bit vectors. 

-- Brad

-----Original Message-----
From: Greg Jaxon [mailto:Jaxon@synopsys.COM] 
Sent: Thursday, October 04, 2007 10:25 AM
To: Brad Pierce
Cc: sv-bc@eda.org
Subject: Re: [sv-bc] Indexed part-select of one-bit vector (11.5.1)

Brad Pierce wrote:
> The description in 11.5.1 regarding indexed part-selects is unclear 
> for the following example --
> 
>   module test( input i, output reg [1:1] o );
>     always @* o[i+:2] = 2'b10;
>   endmodule
> 
> because the range of 'o' is neither ascending nor descending.
> 
> Pointed out to me by Greg Jaxon.
> 
> -- Brad

Yes.  "Test" is either an inverter (if you read it as 1 downto 1) or a
buffer (if you read it as 1 upto 1).  I think we should leave this
ambiguity in the language as a warning to future languages on how NOT to
declare arrays ;-)

Greg


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