Sumay, The LRM says that "The type operator applied to an expression shall represent the self-determined result type of that expression." So you are asking about how to calculate the self-determined type of an expression. The type operator is just one of many contexts where a self-determined context must be calculated. Two common such contexts in Verilog are concatenations and parameter declarations. -- Brad -----Original Message----- From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Sumay Guin Sent: Monday, October 15, 2007 2:53 AM To: sv-bc@eda-stds.org Subject: [sv-bc] confusion in determining the type of an self determined binary expression during evalution of type operator Hi, Consider the usage of type operator, int a,b; byte c ; b = type(a + 6 )'(c); so , what will be the type of self determined binary expression ( here a+6 ) when we try to find out it's type using type operator. Also in case if user specified concatination/multiple concatination expression in type operator then what will be the type of the concatination/multiple concatination expression ? As LRM does not state it clearly, Can someone tell me what would be the type of above expressions. Thanks , Sumay -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Mon Oct 15 03:33:19 2007
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