[sv-bc] RE: [sv-ac] my notes from the face-to-face

This is the behavior I want. But as far as I understood from your
proposal, the default a = 1'b1 will take precedence over top.a.

Thanks,
Dmitry

-----Original Message-----
From: Bresticker, Shalom 
Sent: Monday, October 15, 2007 12:16 PM
To: Korchemny, Dmitry; 'sv-ac@server.eda-stds.org'
Cc: 'sv-bc@server.eda.org'
Subject: RE: [sv-ac] my notes from the face-to-face

In what case is your confusion?

If you write

module mod1(input a=1'b1);
endmodule

module top;
logic a;
mod mod1 (.*) ; 
endmodule

then top.a will be connected to mod1.a.

If top.a does not exist, then 1'b1 will be connected to mod1.a (in our
proposal).

If top.a exists, but it is not type equivalent to mod1.a, it is an
error.

SV-BC is currently discussing how .name and .* should work with
defaults.

Shalom


> -----Original Message-----
> From: Korchemny, Dmitry 
> Sent: Monday, October 15, 2007 10:55 AM
> To: Bresticker, Shalom; john.havlicek@freescale.com; 
> sv-ac@server.eda-stds.org
> Cc: sv-bc@server.eda.org
> Subject: RE: [sv-ac] my notes from the face-to-face
> 
> Hi Shalom
> 
> 
> > - Does .* binding win over default actual argument if the formal
> >   name matches in the instantiation context?
> 
> .* with defaults does not exist in the LRM yet. Mantis 1619 
> (SV-BC) will add defaults for module input ports only. The 
> question is what happens when there is not a match for the 
> formal name in the instantiation context. Mantis 1619 
> proposes currently to take the default. But isn't it clear 
> that if there is a match, that you connect it to the 
> instantiation context? That is the whole point of .*.
> 
> [Korchemny, Dmitry] I think that default should have a 
> smaller precedence. But we have to be consistent in the 
> definitions of module and checker. Have SV-BC already 
> discussed this issue?
> 
> Thanks,
> Dmitry
> 
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