>From: "Feldman, Yulik" <yulik.feldman@intel.com> > >Since all integral types are assignment compatible, it is indeed not >much important to let the conditional operator return the original >"common" matching type of the then- and else- expressions, when the type >is integral. The main reason for still doing that, in my eyes, is >consistency of the definition with non-integral types. If the definition >is different for integral and non-integral types, it will be more >complex to describe and understand it, not vice versa. Verilog already has rules that specify most of the properties of the result of a conditional operator applied to integral types. Those rules may specify a result type that is not the common matching type of the then- and else- expressions. So if the definition for non-integral types is specified that way, then the definition for integral types must be different from it. If you want consistency, it is the rules for the non-integral types that would have to change. I suspect that it is possible to specify the current behavior of most non-integral types in a way that is consistent with the existing rules for integral types. Their behavior would remain the same, but the rules that specified it would be different from the current ones. I suspect that these alternate rules would be harder for most people to understand. Steven Sharp sharp@cadence.com -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Thu Oct 18 15:40:35 2007
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