RE: [sv-bc] Trimming whitespace from macro actuals

Greg, 

> If the committee fails to specify a swiss army preprocessor 
> for SV, will the preprocessing marketplace diverge any more 
> than if we try weakly playing catch up with C preprocessing
> features?   Or is HDL becoming a back-end language for far
> more advanced applications that can easily roll their own 
> text-expansion conventions to suit the application's natural 
> needs?  Shalom is studying Perl, he says.  There are SO MANY 
> excellent text manipulation systems - is it IEEE-1800's job 
> to add to that variety?

There is a need for standard preprocessing directives. Otherwise,

1) I get someone else's code and I have a problem using it because I
don't have his preprocessor.
2) I have to learn and use more than one preprocessor.

It might have been wiser if the original Verilog language had used a
standard processor such as CPP (though I don't know what the state of
CPP was 20 years ago), but that did not happen.

Shalom
---------------------------------------------------------------------
Intel Israel (74) Limited

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.