RE: [sv-bc] Mantis 1984

Shalom,
 
Are you saying that port declarations like
 
   module test(input int i, output o);
   endmodule

were illegal in IEEE Std 1800-2005? 
 
Do any existing tools really error on this?
 
-- Brad
 
 

________________________________

From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of
Bresticker, Shalom
Sent: Saturday, December 15, 2007 9:59 AM
To: Bresticker, Shalom; sv-bc
Subject: RE: [sv-bc] Mantis 1984


I revised the proposal by listing all the 'input bit' cases.
 
Shalom


________________________________

	From: owner-sv-bc@server.eda.org
[mailto:owner-sv-bc@server.eda.org] On Behalf Of Bresticker, Shalom
	Sent: Friday, December 14, 2007 1:10 PM
	To: sv-bc
	Subject: [sv-bc] Mantis 1984
	
	

	Please review above proposal. I would like to vote on it on
Monday. 

	Thanks, <<1984_D4_inputs.htm>> 
	Shalom 

	Shalom Bresticker 
	Intel Jerusalem LAD DA 
	+972 2 589-6582 
	+972 54 721-1033 

	
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