[sv-bc] query for assignment pattern evalution

Hi,
      Consider the scenario,
       module top;
         ...........
         bit [2:0] arr [ 1:0];
         .........
         initial
             arr = '{bit : 1'b1}; // whether output will be 011011 or 
111111
       endmodule

       For the above scenario Please can any one tell me whether 1'b1 
wiil be
       assigned to each bit of "bit [2:0]" or to the entire "bit [2:0]" for
       arr[1] or arr[0]. Most of the standard simulator does not support 
this
       scenario. Your response is important for me. 

Thanks & Regards,
Sumay



-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.