RE: [sv-bc] "Assignment ... to a constant expression"

The simple short-term fix would be to delete the sentence and replace it
with a "See  6.7 for more details."

Shalom

> Is the sentence needed at all anymore?
> 
> -- Brad
> 
> -----Original Message-----
> From: Stuart Sutherland [mailto:stuart@sutherland-hdl.com]
> 
> I agree that this is an issue that is due to merging the 
> wording from two standards together.  I think the intent is 
> clear, and does not need committee discussion on what the 
> standard should say.  Can someone suggest specific wording 
> changes?  Based on that suggestion, we can decide if it is 
> just an editorial correction, or should go through the 
> committee review and approval chain.  
> 
> > -----Original Message-----
> > From: Bresticker, Shalom
> > 
> > That was the original intent. That sentence comes from 1364-2001,
> > 6.2.1:
> > 
> > "The variable declaration assignment is a special case of 
> procedural 
> > assignment as it assigns a value to a variable. It allows 
> an initial 
> > value to be placed in a variable in the same statement that 
> declares 
> > the variable. The assignment shall be to a constant expression. The 
> > assignment does not have duration; instead, the variable holds the 
> > value until the next assignment to that variable. Variable 
> declaration 
> > assignments to an array are not allowed. Variable declaration 
> > assignments are only allowed at the module level."
> > 
> > Note that in the BNF, originally when the variable declaration 
> > assignment was introduced in Verilog-2001, the RHS was 
> > constant_expression. In SV 3.1a, it was changed from 
> > constant_expression to expression, to allow expressions that 
> > constant_expression does not allow.
> > 
> > While the use of "to" here is misleading, as the assignment 
> is to the 
> > variable, not to the RHS, the entire sentence is no longer correct.
> 6.7
> > says,
> > 
> > "A variable can be declared with an initializer, for 
> example: int i = 
> > 0; ..
> > Initial values are not constrained to simple constants; they can 
> > include run-time expressions, including dynamic memory 
> allocation. For
> example,
> > a static class handle or a mailbox can be created and 
> initialized by 
> > calling its new method (see 15.4.1), or static variables can be 
> > initialized to random values by calling the $urandom system 
> task. This 
> > may require a special pre-initial pass at run time."
> > 
> > That is what happens when a single subject is described in several 
> > places. Besides correcting 10.5, the two sub-clauses should 
> > cross-reference each other. Even better would be to merge them.
> > 
> > As an LRM merge issue, I believe we can still work on this.
> > 
> > Thanks,
> > Shalom
> > 
> > 
> > > According to 10.5 of Draft 4 --
> > >
> > >   "The variable declaration assignment is a special case of 
> > > procedural assignment as it assigns a value to a 
> variable. It allows 
> > > an initial value to be placed in a variable in the same statement 
> > > that declares the variable. The assignment shall be to a constant 
> > > expression."
> > >
> > > What does it mean to assign "to a constant expression"?  Is this 
> > > trying to say that in a variable_decl_assignment, if the 
> variable is 
> > > static, then the right-hand side shall be a constant expression?
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Intel Israel (74) Limited

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