[sv-bc] extern modules

Hi,

 

The LRM doesn't specify if extern can be used subsequent to the module
defintion. Is it

correct to assume that this is permitted? Maybe this can be clarified in the
LRM.

 

If so, this makes implementation of .* in the module port list quite
difficult. The reason is

that nets and variables can not be checked for correct usage until the
extern is compiled.

There is no issue with .* if the extern occurs before the module definition.

 

For example:

 

module foo(.*);

 

initial

  begin

  r[0] = 1'b0;

  v = 5;

end

 

endmodule

 

extern module foo(output [3:0] r);

 

When foo is compiled the size of r is not known. Also v isn't declared so it
is an error but

this can't be determined until the extern is compiled.

 

I know that VCS doesn't implement extern, is extern supported by any
simulators?

 

Thanks,

 

Jason


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