[sv-bc] Delay on continuous assignment to variable

Hi,

10.3.3 says,

"A delay given to a continuous assignment shall specify the time
duration between a right-hand operand
value change and the assignment made to the left-hand side. If the
left-hand references a scalar net, then the
delay shall be treated in the same way as for gate delays; that is,
different delays can be given for the output
rising, falling, and changing to high impedance (see 27.16).

If the left-hand references a vector net or a variable, then up to three
delays can be applied. The following
rules determine which delay controls the assignment:
- If the right-hand side makes a transition from nonzero to zero, then
the falling delay shall be used.
- If the right-hand side makes a transition to z, then the turn-off
delay shall be used.
- For all other cases, the rising delay shall be used."

In the 2nd paragraph, the words "or a variable" were added in the LRM
merge. I don't think this is correct. A continuous assignment to a
variable can only have a single delay, not three delays.

The BNF is
continuous_assign ::= // from A.6.1
	 assign [ drive_strength ] [ delay3 ] list_of_net_assignments ;
	| assign [ delay_control ] list_of_variable_assignments ;

Note that each delay can be a mintypmax_expression.

Thanks,
Shalom

Shalom Bresticker
Intel Jerusalem LAD DA
+972 2 589-6582
+972 54 721-1033

---------------------------------------------------------------------
Intel Israel (74) Limited

This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.