[sv-bc] RE: [sv-ac] RE: [sv-ec] query reagrding sequence method "triggered"

Dmitry,

 

I have a related question.  Is it illegal to use "seq.matched" when the
clocks are not different?

 

sequence seq1; 
  @(posedge clk) 
   out[0] ##1 out[1] ; 
endsequence 

property p1; 
  @(posedge clk) 
   reset ##1 seq1.matched ##1 out;  // Wrong syntax ???
endproperty

 

Lisa

 

________________________________

From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Korchemny, Dmitry
Sent: Thursday, August 28, 2008 2:17 AM
To: Sarani Roy; sv-bc@eda.org; sv-ac@eda.org; sv-ec@eda.org
Subject: [sv-ac] RE: [sv-ec] query reagrding sequence method "triggered"

 

Hi Sarani,

 

reset ##1 seq1.triggered ##1 out is illegal according to the current
LRM, since this method is used in your example in a sequence context.
This syntax will however become legal in the coming LRM.

 

Regards,

Dmitry

 

________________________________

From: owner-sv-ec@server.eda.org [mailto:owner-sv-ec@server.eda.org] On
Behalf Of Sarani Roy
Sent: Thursday, August 28, 2008 8:48 AM
To: sv-bc@server.eda.org; sv-ac@server.eda.org; sv-ec@server.eda.org
Subject: [sv-ec] query reagrding sequence method "triggered"

 

Hi, 

According to LRM1800-2005  section 17.12.6 "The value of method
triggered evaluates to true if the given 
 sequence has reached its end point at that particular point in time and
false otherwise. The triggered 
status of the sequence is set in the Observe region and persists through
the remainder of the time step. 
This method shall only be used in wait statements or boolean expressions
(see 10.11) outside of 
sequence context or in the disable iff boolean expression for
properties. " 

module top (clk, reset, out); 

input clk, reset; 
output[3:0] out; 
wire clk, reset; 
reg [3:0] out; 

always @(posedge clk) 
    begin 
        if (reset== 1'b1) 
           out <= 0; 
        else 
           out <= out + 1; 
    end 


sequence seq1; 
  @(posedge clk) 
   out[0] ##1 out[1] ; 
endsequence 

property p1; 
  @(posedge clk) 
   reset ##1 seq1.triggered ##1 out;  // Wrong syntax ???
endproperty 

assert property (p1); 

endmodule 

Some tools are failing but it is not explicitly written in the LRM that
it is an error.

Regards,
Sarani

---------------------------------------------------------------------
Intel Israel (74) Limited
 
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.

-- 
This message has been scanned for viruses and 
dangerous content by MailScanner <http://www.mailscanner.info/> , and is

believed to be clean. 
-- 
This message has been scanned for viruses and 
dangerous content by MailScanner <http://www.mailscanner.info/> , and is

believed to be clean. 

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.