[sv-bc] RE: functional if statement

From: Satyakam Sudershan <satyakam_at_.....>
Date: Tue Dec 09 2008 - 07:00:26 PST
Thanks Shalom;

 

  I agree that if we try and implement a flip-flop the way you suggest
would be right; the question I am however asking you now (which is
admittedly different) is that given the Verilog semantics; should the
function call return in expression (enable ? din : X)

 

Sorry for the bother and thanks in advance.

Regards,
Satyakam

 

________________________________

From: Bresticker, Shalom [mailto:shalom.bresticker@intel.com] 
Sent: Tuesday, December 09, 2008 8:26 PM
To: Satyakam Sudershan; Kapil Kaushik; sv-bc@server.eda.org
Subject: RE: functional if statement

 

The question asked was:

 

Given the above description, can I replace the command "dout <=
func(enable,din)" by "dout <= enable ? din : 1'bx"?

 

The original code given was apparently intended to model a flip-flop.

I interpreted the question as being how can "if (enable) dout = din;" be
replaced by a one-line assignment that will give the same functionality.

Since in "if (enable) dout = din;", if enable is false, no assignment is
made to dout, then dout retains its previous value.

"dout <= enable ? din : dout;" achieves that purpose.

 

Shalom


 

	
________________________________


	From: Satyakam Sudershan [mailto:satyakam@Magma-DA.COM] 
	Sent: Tuesday, December 09, 2008 4:47 PM
	To: Kapil Kaushik; Bresticker, Shalom; sv-ac@server.eda.org;
sv-bc@server.eda.org; sv-ec@server.eda.org
	Subject: RE: functional if statement

	Hello Shalom;

	 

	 Sorry to bother you; but I have the following confusion on this
and would greatly appreciate your help. Verilog states

	1) That all reg have an initial value X;

	2) A function returns a complete expression.

	 

	With respect to the following function; does it mean that the
return expression of the function should be independent of the calling
context and hence should return the expression (enable ? din : X). Is
that understanding correct?

	 

	function    func; 

	  input     enable;     

	  input din;

	  reg temp; 

	 

	    begin

	      if (enable) 

	        temp = din;

	      func = temp;            // Latch inferred

	 

	    end

	endfunction

	 

	Thanks and regards

	Satyakam

	 

	
________________________________


	From: Kapil Kaushik 
	Sent: Tuesday, December 09, 2008 7:32 PM
	To: Bresticker, Shalom; sv-ac@server.eda.org;
sv-bc@server.eda.org; sv-ec@server.eda.org
	Cc: Satyakam Sudershan
	Subject: RE: functional if statement

	 

	Hi Shalom,

	 

	Thanks for the clarification.

	 

	Regards,

	Kapil

	 

	
________________________________


	From: Bresticker, Shalom [mailto:shalom.bresticker@intel.com] 
	Sent: Tuesday, December 09, 2008 7:28 PM
	To: Kapil Kaushik; sv-ac@server.eda.org; sv-bc@server.eda.org;
sv-ec@server.eda.org
	Cc: Satyakam Sudershan
	Subject: RE: functional if statement

	 

	Should be.

	 

	Shalom

		 

		
________________________________


		From: Kapil Kaushik [mailto:kkapil@Magma-DA.COM] 
		Sent: Tuesday, December 09, 2008 3:51 PM
		To: Bresticker, Shalom; sv-ac@server.eda.org;
sv-bc@server.eda.org; sv-ec@server.eda.org
		Cc: Satyakam Sudershan
		Subject: RE: functional if statement

		Yes, sorry, a typo on my part.

		After correction, are the two equivalent?

		 

		Thanks,

		Kapil

		
________________________________


		From: Bresticker, Shalom
[mailto:shalom.bresticker@intel.com] 
		Sent: Tuesday, December 09, 2008 4:45 PM
		To: Kapil Kaushik; sv-ac@server.eda.org;
sv-bc@server.eda.org; sv-ec@server.eda.org
		Cc: Satyakam Sudershan
		Subject: RE: functional if statement

		 

		I don't see the connection between this and standards
work, but I'll answer anyway.

		What you probably want is

		dout <= enable ? din : dout;

		 

		Shalom

			 

			
________________________________


			From: owner-sv-bc@server.eda.org
[mailto:owner-sv-bc@server.eda.org] On Behalf Of Kapil Kaushik
			Sent: Tuesday, December 09, 2008 1:05 PM
			To: sv-ac@server.eda.org; sv-bc@server.eda.org;
sv-ec@server.eda.org
			Cc: Satyakam Sudershan
			Subject: [sv-bc] functional if statement

			Hi,

			 

			I have the following piece of rtl:

			 

			always @(posedge ck54 or negedge p_rst_x) begin

			    if (~p_rst_x) 

			      dout <= 3'd0;     

			    else 

			      dout <= func( enable, din);

			      // if (enable)      // Works fine

			        // dout = din;   // Works fine

			      end

			      

			      function    func; 

			  input     enable;     

			  input din;

			  reg temp; 

			 

			    begin

			      if (enable) 

			        temp = din;

			      func = temp;            // Latch inferred

			 

			    end

			  endfunction

			 

			Given the above description, can I replace the
command "dout <= func(enable,din)" by "dout <= enable ? din : 1'bx"?

			Kindly suggest.

			 

			Thanks,

			Kapil

			
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Received on Tue Dec 9 07:03:30 2008

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