Surya, The consensus here has been that there are only one-dimensional arrays in SystemVerilog, yet there may be arrays of arrays. The syntax is not context dependent. {} is always a concatenation. It's just that the operator is overloaded. Dave -----Original Message----- From: owner-sv-bc@server.eda.org [mailto:owner-sv-bc@server.eda.org] On Behalf Of Surya Pratik Saha Sent: Wednesday, December 10, 2008 8:27 PM To: sv-bc@server.eda.org Subject: [sv-bc] Question on 'Unpacked array concatenation' Hi, I have following question on 'Unpacked array concatenation'. Does it apply only on one dimensional unpacked array, or more than one dimensional array also can be assigned? For e.g. int x[1:0][2:0]; int y[2:0]; x = {y, y}; // is it valid? Also do we consider 'Unpacked array concatenation' as aggregate expression? LRM is not clear enough on that. I feel 'Unpacked array concatenation' concept is too much context dependent having similar syntax with concatenation, which will make very complex to implement semantic checks/ expression evaluation etc. for the vendors when hierarchical reference/ forward typedefs etc. will be involved. Can we not use different syntax to support it? -- Regards Surya -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. -- This email was Anti Virus checked by Astaro Security Gateway. http://www.astaro.com -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Wed Dec 10 21:16:57 2008
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