>From: Gordon Vreugdenhil <gordonv@model.com> >The LRM doesn't clearly discuss this issue, but I suspect that >"determination at exit" is the expected answer (meaning that >"object2" is the target in my original example). > >Does everyone concur with that expectation? I do. The semantics of parameter passing are equivalent to assignment. For an output argument, the assignment is performed when the task returns. Like any other blocking assignment, the lvalue is determined when the assignment is performed. >There are similar issues with respect to array indexing using >an index expression that changes during the task evaluation. Yes. This question already existed with array indexing in Verilog-1995. This means that we can use Verilog-XL to determine the original intent in the language. Verilog-XL determines what the lvalue is at exit. >In addition, if the formal in "next_val" was "inout", then >adopting "determination at exit" would mean that the copy-in >and copy-out could actually relate to different locations >(object1's id would be copied-in; object2's id would be >the copy out target). Agreed. I remember learning about this oddity long ago, with a testcase that demonstrated it using array indexing. Steven Sharp sharp@cadence.com -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.Received on Fri Dec 12 19:29:46 2008
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