Hi,
In SV 2009 draft 7a LRM, in many number places there are references of
"hierarchical names" and "hierarchical references". I hope the meaning
are same. Please confirm.
Now in "Type operator" section (6.23), it is mentioned:
The expression shall not be evaluated and shall not contain any
hierarchical references or references to elements of dynamic objects.
If we consider "hierarchical names" and "hierarchical references" have
same meaning, then following e.g. should be illegal
module top;
type (ta.s.x) t1;
// First identifier is not yet defined, so it is hierarchical name
type (s.x) ti2;
// First identifier is not yet defined, so it is hierarchical name
struct {int x;} s;
task ta;
struct {int x;} s;
endtask
endmodule
But some standard simulators support this. So please let me know if my
understanding is incorrect.
--
Regards
Surya
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Received on Wed Jun 3 22:57:43 2009