[sv-bc] RE: Assignment compatibility of packed arrays of enums

From: Bresticker, Shalom <shalom.bresticker_at_.....>
Date: Sat Oct 03 2009 - 23:16:38 PDT
6.22.2(c) says,

"Packed arrays, packed structures, packed unions, and built-in integral types are equivalent if they contain the same number of total bits, are either all 2-state or all 4-state, and are either all signed or all unsigned.

typedef bit signed [7:0] BYTE;                       // equivalent to the byte type
typedef struct packed signed {bit[3:0] a, b;} uint8; // equivalent to the byte type"

Doesn't this cover the situation?

Shalom

> -----Original Message-----
> From: owner-sv-bc@server.eda.org 
> [mailto:owner-sv-bc@server.eda.org] On Behalf Of Brad Pierce
> Sent: Friday, October 02, 2009 8:17 PM
> To: sv-bc@eda.org
> Subject: [sv-bc] Assignment compatibility of packed arrays of enums
> 
> 2009 makes it legal to create packed arrays of enums.  Is it 
> legal to assign a data object of such a type with a value 
> that is not a packed array of the same kind of enums?
> 
> In the following element-by-element assignment, the explicit 
> cast is required
> 
> typedef enum logic {FALSE, TRUE} Boolean;
> 
> module test1
> (   input  logic   [5:0] in
> ,   output Boolean [5:0] out
> );
>   for (genvar I = 0; I < 6; I++) begin
>      assign out[I] = Boolean'(in[I]);
>   end
> endmodule
> 
> But are both of the following assignments legal?
> 
> typedef enum logic {STOP, GO} NotBoolean;
> 
> module test2
> (  input  logic      [5:0] in1
> ,  input  NotBoolean [5:0] in2
> ,  output Boolean    [5:0] out1, out2
> );
>   assign out1 = in1;
>   assign out2 = in2;
> endmodule
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Received on Sat Oct 3 23:21:09 2009

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