RE: [sv-bc] Is packed dimension allowed for type variable?

Surya,

I think this may be just an oversight in the BNF.  Regardless, the
declaration in the second module top should be legal with the current
LRM.

Dave




> -----Original Message-----
> From: owner-sv-bc@server.eda.org [mailto:owner-sv-bc@server.eda.org]
On
> Behalf Of Surya Pratik Saha
> Sent: Thursday, October 15, 2009 10:19 PM
> To: sv-bc@eda.org
> Cc: Sourasis Das
> Subject: [sv-bc] Is packed dimension allowed for type variable?
> 
> Hi,
> As per the BNF, packed dimension can not be present after
> type_reference. So following e.g. is illegal:
> 
> module top;
>     var type(logic) [2:0] x;
> endmodule
> 
> But if we declared via a typedef like:
> module top;
>     typedef type(logic) mytype;
>     mytype [2:0] x;
> endmodule
> 
> Is it allowed? If yes, then is it not logical to allow packed
dimension
> with direct type_reference when the type used in type_reference is
> integer_vector_type.
> 
> --
> Regards
> Surya
> 
> 
> 
> 
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