RE: [sv-ac] RE: [sv-bc] Precedence between sequence/property operator and normal expression operator

<forwarding bounced email from John Havlicek>


-------- Original Message --------
Subject: RE: [sv-ac] RE: [sv-bc] Precedence between sequence/property operator and normal expression operator
Date: Wed, 25 Nov 2009 06:07:06 -0700
From: "Havlicek John-R8AAAU" <r8aaau@freescale.com>
To: "Surya Pratik Saha" <spsaha@cal.interrasystems.com>,
         "Brad Pierce" <Brad.Pierce@synopsys.com>
Cc: <sv-bc@server.eda.org>, <sv-ac@server.eda.org>


Hi Surya:

My understanding is that '+' should have higher precedence than '|->'.

Please file a Mantis.  We can review whether or not there is any
existing description of the precedence and clarify as necessary when
work is authorized.

J.H.

-----Original Message-----
From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of
Surya Pratik Saha
Sent: Wednesday, November 25, 2009 1:27 AM
To: Brad Pierce
Cc: sv-bc@eda.org; sv-ac@eda.org
Subject: Re: [sv-ac] RE: [sv-bc] Precedence between sequence/property
operator and normal expression operator

Hi John/Brad,
I am member of both SV-BC and SV-AC mail aliases. Though I did not get
John's mail yet.

However, if that is the intention that expression operators have higher
precedence over assertion operators, then it should be written somewhere
in the LRM.

Here is an example:
module m1(input clk,e,c);
     assert property (@(posedge clk) not c + e|-> e); endmodule

Now LRM is not clear what is the precedence between '+' and '|->'.
Should I file a Mantis for that?

Regards
Surya



-------- Original Message  --------
Subject: Re:[sv-ac] RE: [sv-bc] Precedence between sequence/property
operator and normal expression operator
From: Brad Pierce <Brad.Pierce@synopsys.com>
To: sv-bc@eda.org <sv-bc@eda.org>, sv-ac@eda.org <sv-ac@eda.org>
Date: Wednesday, November 25, 2009 11:50:35 AM
> John,
>
> Surya will see your response via SV-BC where he's an important
contributor.
>
> Maybe he'll also share an example that highlights the ambiguity?
>
> -- Brad
>
> -----Original Message-----
> From: Havlicek John-R8AAAU [mailto:r8aaau@freescale.com]
> Sent: Tuesday, November 24, 2009 8:05 PM
> To: Brad Pierce; sv-bc@eda.org; sv-ac@eda.org
> Subject: RE: [sv-ac] RE: [sv-bc] Precedence between sequence/property 
> operator and normal expression operator
>
> Hi Brad:
>
> I'm not sure if Surya will get copied from one of these lists ...
>
> The intention in SV-AC was always that the expression operators take 
> precedence over sequence and property operators.  This may never have 
> been written out explicitly.
>
> J.H. 
>
> -----Original Message-----
> From: owner-sv-ac@eda.org [mailto:owner-sv-ac@eda.org] On Behalf Of 
> Brad Pierce
> Sent: Tuesday, November 24, 2009 12:33 PM
> To: sv-bc@eda.org; sv-ac@eda.org
> Subject: [sv-ac] RE: [sv-bc] Precedence between sequence/property 
> operator and normal expression operator
>
> Cc'ing in SV-AC.
>
> -----Original Message-----
> From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of 
> Surya Pratik Saha
> Sent: Tuesday, November 24, 2009 5:46 AM
> To: sv-bc@eda.org
> Subject: [sv-bc] Precedence between sequence/property operator and 
> normal expression operator
>
> Hi,
> In SV 2009 draft7a LRM, there are two tables. Table 11-2 defines the 
> precedence of normal expression operator. And Table 16-3 defines the 
> precedence of sequence and property operators. But I do not find any 
> clarification regarding the precedence between those two set of 
> operators. Please let me know where do I find for them.
>
>   




-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.