RE: [sv-bc] changing the lifetime of begin end block

Well I'm confused. IMO both statement cited below are in contradiction.
 
DANiel

  _____

From: Bresticker, Shalom [mailto:shalom.bresticker@intel.com]
Sent: Thursday, February 11, 2010 11:29 AM
To: Daniel Mlynek; sv-bc@eda.org
Subject: RE: [sv-bc] changing the lifetime of begin end block

Hi,
 
6.21 says,
"An optional qualifier can be used to specify the default lifetime of all
variables declared in a task, function, or block defined within a module,
interface, package, or program. The lifetime qualifier is automatic or
static."
 
So a is automatic.
 
Regards,
Shalom

  _____

From: owner-sv-bc@eda.org [mailto:owner-sv-bc@eda.org] On Behalf Of Daniel
Mlynek
Sent: Thursday, February 11, 2010 12:22 PM
To: sv-bc@eda.org
Subject: [sv-bc] changing the lifetime of begin end block

LRM1800-2009 adds new statement to the desc of module header:
 "The module header defines the following: - The default lifetime (static
or automatic) of subroutines defined within the module"

My questiion is if default lifetime for module should be deafult only for
subroutines declared inside such module or also to block declared in this
module - see below example:

module automatic top;
bit clk;
initial repeat (10) #10 clk = ~clk;
always @(clk)
begin
     int a = 0; //<<<<this variable should be static or atuomatic???
    $display(a);
    a++;
end
endmodule

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