Subject: [sv-ec] suggested question for Synopsys and especially Cadence
From: Stefen Boyd (stefen@boyd.com)
Date: Fri Dec 06 2002 - 18:23:54 PST
David,
Since Cadence has begun beating the "no new keywords"
drum, I thought it might help all of us (especially
users!) to know of any keyword conflicts that can
be found by grepping the huge repository of designs
that both companies have as part of their test suites.
This would give us a real idea of what might happen
to legacy verilog if it is used with a SV compliant
simulator or synthesis tool that supports the new
collection of keywords.
Most importantly, it will also greatly help this stuff
make it across into 1364 intact.
Regards,
Stefen
--------------------
Stefen Boyd Boyd Technology, Inc.
stefen@BoydTechInc.com (408)739-BOYD
www.BoydTechInc.com (408)739-1402 (fax)
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