RE: [sv-ec] suggested question for Synopsys and especially Cadence


Subject: RE: [sv-ec] suggested question for Synopsys and especially Cadence
From: David W. Smith (dws@dolcesfogato.com)
Date: Sat Dec 07 2002 - 08:41:00 PST


Yep.

-----Original Message-----
From: owner-sv-ec@eda.org [mailto:owner-sv-ec@eda.org] On Behalf Of
Kevin Cameron
Sent: Friday, December 06, 2002 11:48 PM
To: sv-ec@eda.org
Cc: david.smith@synopsys.com; stefen@boyd.com
Subject: Re: [sv-ec] suggested question for Synopsys and especially
Cadence

Another question...

The CC is thinking of using the syntax:

  extern <attribute>{,<attribute>} ...

for external functions e.g.:

  extern pure,context xfunc();

I presume that would make "pure" and "context" keywords.
if we change it to:

  extern (pure,context) xfunc();

Are they still keywords?

Kev.

  
> From: Stefen Boyd <stefen@boyd.com>
>
> David,
>
> Since Cadence has begun beating the "no new keywords"
> drum, I thought it might help all of us (especially
> users!) to know of any keyword conflicts that can
> be found by grepping the huge repository of designs
> that both companies have as part of their test suites.
> This would give us a real idea of what might happen
> to legacy verilog if it is used with a SV compliant
> simulator or synthesis tool that supports the new
> collection of keywords.
>
> Most importantly, it will also greatly help this stuff
> make it across into 1364 intact.
>
> Regards,
> Stefen
>
>
> --------------------
> Stefen Boyd Boyd Technology, Inc.
> stefen@BoydTechInc.com (408)739-BOYD
> www.BoydTechInc.com (408)739-1402 (fax)
>



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