Re: [sv-ec] Re: $wait_all/any/...


Subject: Re: [sv-ec] Re: $wait_all/any/...
From: Michael McNamara (mac@verisity.com)
Date: Thu Dec 26 2002 - 17:11:47 PST


Steven Sharp writes:
> > always @(a then b); // equivalent to wait priority
> >
> >None of these need a new keyword
>
> "then" would be a new keyword. Verilog if-statements don't use
> "then".

Good point! I've been drinking too much egg nog.

> And I haven't seen an explanation of how this would be different from the
> existing @a; @b that you suggested earlier.

 I also see no difference, and don't see value in making Verilog more
 into a language like perl that has 5 ways of doing the same thing.

 If the feature adds significant new capability, let us do it, in a
 100% backward compatible way.

 If the feature merely introduces another way to do something that we
 can do already, let us exercise restraint. More is less!

>
> Steven Sharp
> sharp@cadence.com
>



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