Re: [sv-ec] Clocking Domains


Subject: Re: [sv-ec] Clocking Domains
From: Michael McNamara (mac@verisity.com)
Date: Thu Jan 30 2003 - 12:22:16 PST


Kevin Cameron x3251 writes:
> Yes, but I think you just make my point:
>
> always @(posedge clk.new) q = d1;
> always @(posedge clk) d1 = d2 ;
>
> isn't indeterminate. Using .new gives better control of data
> sampling, and is potentially more efficient since you get to use
> blocking assigns for everything.
>
> .new is also cheap to implement and doesn't add any new phases to event
> processing.
>

1) How do you sythesize this '@(posedge clock.new)'

2) Can't you unambiguate this already by:

   always @(posedge clk) q = d1;
   always @(posedge clk) #0 d1 = d2 ;

3) or even better:

   always @(posedge clk) begin
      q = d1;
      d1 = d2;
   end

-mac



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