Subject: RE: [sv-ec] Email vote on var usage
From: Kevin Cameron x3251 (Kevin.Cameron@nsc.com)
Date: Tue Feb 04 2003 - 15:07:47 PST
> From: "Jay Lawrence" <lawrence@cadence.com>
>
>
> Mac,
>
> Just to make sure you know what your expressing an interest on. This is
> not to actually take a reference (i.e. address of) an object. This is
> just to declare in a task or function argument list that the object
> should be passed by reference.
However there are a bunch of things which are used by reference without
explicit syntax - which I think is confusing and should be replaced. If
you use "var" here, you'll probably have to use it everywhere.
> There is still no address of operator in SystemVerilog (thank god).
>
> Jay
References aren't the same as pointers, which is why the proposal is for
'&' and not '*' ('*' is in the proposal for handles for foreign objects
- which might be pointers).
Kev.
>
> ===================================
> Jay Lawrence
> Architect - Functional Verification
> Cadence Design Systems, Inc.
> (978) 262-6294
> lawrence@cadence.com
> ===================================
>
> > -----Original Message-----
> > From: Michael McNamara [mailto:mac@verisity.com]
> > Sent: Tuesday, February 04, 2003 5:39 PM
> > To: Stefen Boyd
> > Cc: David W. Smith; sv-ec@eda.org
> > Subject: Re: [sv-ec] Email vote on var usage
> >
> >
> >
> > Stefen Boyd writes:
> > > [1 <text/plain; us-ascii (7bit)>]
> > > At 05:04 PM 2/3/2003 -0800, David W. Smith wrote:
> > > > __yes _x_no var
> > > > __yes _x_no ref (substitute use of var with ref)
> > > > _x_yes __no & (substitute use of var with & and
> > move the use to
> > > > just before the argument name - instead of before the type)
> > >
> > > --------------------
> > > Stefen Boyd Boyd Technology, Inc.
> > > stefen@BoydTechInc.com (408)739-BOYD
> > > www.BoydTechInc.com (408)739-1402 (fax)
> > > [2 <text/html; us-ascii (7bit)>]
> > >
> >
> > I know I am not eligiable to vote, but I endorse the use of '&' in
> > indicate taking a reference.
> >
> > -mac
> >
>
>
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