Subject: [sv-ec] Agenda for meeting 10 February 2003
From: David W. Smith (david.smith@synopsys.com)
Date: Fri Feb 07 2003 - 17:10:22 PST
There will be an extra meeting for the SV-EC committee from 11:00am until
1:00pm PDT on Monday 10 February 2003.
Meeting will start promptly at 11:00am and may run over in order to complete
review of all three chapters.
Dial in Information
* PARTICIPANT CODE: 516134
* Toll Free Dial In Number: (877)233-7845
* International Access/Caller Paid Dial In Number: (505)766-5458
Agenda
1. Review and approve minutes from Feb 3 meeting (as ammended on web site).
2. Review and resolve email voting results on var/ref/& (see attached)
3. Review open action item status
4. Review LRM
a. Review 11, 12
b. Vote on acceptance of Chapters 1-11, 12 (with condition that all
relate action items will be approved)
5. Address any other issues before committee
For the rest of the review process discussion will be limited to the
following items:
clarification
problems
solutions to clarification and problems
No new proposals will be entertained.
A copy of the LRM is available at:
<http://www.sutherland-hdl.com/download/SystemVerilog_3.1_draft1.pdf>
http://www.sutherland-hdl.com/download/SystemVerilog_3.1_draft1.pdf
Please review the information available on the website:
< <http://www.eda.org/sv-ec> http://www.eda.org/sv-ec>
<http://www.eda.org/sv-ec> http://www.eda.org/sv-ec.
David W. Smith
Synopsys Scientist
Synopsys, Inc.
Synopsys Technology Park
2025 NW Cornelius Pass Road
Hillsboro, OR 97124
Voice: 503.547.6467
Main: 503.547.6000
FAX: 503.547.6906
Email: david.smith@synopsys.com
<http://www.synopsys.com/> http://www.synopsys.com
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