[sv-ec] foreach loop


Subject: [sv-ec] foreach loop
From: Ryan, Ray (Ray_Ryan@mentorg.com)
Date: Mon Oct 13 2003 - 10:27:14 PDT


Regarding the foreach example in ext-15.

  // 1 2 3 3 4 1 2 -> dimension numbers
  int A [2][3][4]; bit [3:0][2:1] B [5:1][4]
  foreach( B [ q,r,,s] )...

  .... The second foreach causes q to interate from 5 to 1,
  r from 0 to 3, and s from 2 to 1 (iteration over the 3rd index
  is skipped).

Since the [4] in the declaration of B is equavalent to [3:0] shouldn't
'r' iterate from 3 to 0.

In an iterative constraint (ext-14), the iteration order is not
significant, however, in the more general construct (ext-15), the order
is signficant.

Also since the order is significant:
A foreach with multiple loop variables implies a nesting of loops, one
for each variable. The foreach definition (8.5.3) should specify the nesting
order of the loop variables.

Ray



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