[sv-ec] Errata to add block variable to automatic default

Subject: [sv-ec] Errata to add block variable to automatic default
From: Dave Rich (David.Rich@synopsys.com)
Date: Thu Dec 11 2003 - 22:46:33 PST

When the optional qualifier to specify the default lifetime of all tasks and functions declared within a module, interface or program, the fact that automatics could be declared in procedural blocks was overlooked.
I propose to add procedural blocks, and move the section to a more appropriate spot. No BNF change is required

ADD before the paragraph  in 5.5 Scope and lifetime

SystemVerilog adds an optional qualifier to specify the default lifetime of all variables declared in task, function or block defined
within a module, interface or program (see Section 16). The lifetime qualifier is automatic or static. The default lifetime is static.
 
  program automatic test ;
    int i; //  not within a procedural block - static
    task foo( int a ); // arguments and variables in foo are automatic
    ...
    endtask
  endmodule
Class methods and declared for loop variables are by default automatic, regardless of the lifetime attribute of the scope in which they are
declared. Classes are discussed in Section 11.

Note that automatic or dynamic variables cannot.....

REMOVE the entire section 10.4 Task and function scope and lifetime

In Verilog-2001, the default lifetime for tasks and functions is static. Automatic tasks and functions must be
explicitly declared, using the automatic keyword.
SystemVerilog adds an optional qualifier to specify the default lifetime of all tasks and functions declared
within a module, interface or program (see Section 16). The lifetime qualifier is automatic or static. The
default lifetime is static.
program automatic test ;
task foo( int a ); // arguments and variables in foo are automatic
...
endtask
endmodule
 Class methods are by default automatic, regardless of the lifetime attribute of the scope in which they are
declared. Classes are discussed in Section 11.
-- 
--
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