Subject: RE: Proposal: Deprecate procedural assign-deassign
From: Clifford E. Cummings (cliffc@sunburst-design.com)
Date: Tue Oct 30 2001 - 11:31:13 PST
At 10:55 AM 10/30/01 -0800, Dennis Brophy wrote:
>It is nice to see this, but I can attest from someone that has already
>implemented these features, they tend to stay. Yes, you remove them from
>the spec, but the industry continues to use them. (And yes, I know one of
>the world's leading semiconductor companies which continues to use
>defparam's and will most likely do so even if dropped by Verilog-ACE.)
>
>-Dennis
Probably true.
Deprecation and the reason for doing so must be founded on good reasons and
then the user community must be educated to understand why it is in their
best interest to change old habits and old code.
I can think of three scenarios that might actually move a company or
individual to change (a combination of all three would hasten the change):
(1) Recognized experts frequently and publicly denouncing the practice as
archaic, inefficient and uninformed (shaming tends to work over time when
supported from multiple fronts and requests - the Verilog-2001 team has
been using this method to speed vendor development of Verilog-2001).
(2) I am hoping that vendors can implement a faster compiler in the absence
of defparams (after all, it was the vendors who complained bitterly about
the existence of defparams). If true, vendors should issue a warning about
deprecated defparams and report that "compilation with defparams will be
less efficient than a comparable design compiled only using parameter
passing by name."
(3) Encourage as many vendors as possible to issue syntax errors when
compiling defparams. Then provide a command line switch (that could be
aliased into the Verilog invocation command) to permit defparam usage in a
model.
I agree with Dennis, it is one thing to deprecate, it is quite another to
put together a strategy to offer advantage and encourage compliance with
the new coding recommendations.
Regards - Cliff
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