(no subject)


Subject: (no subject)
From: Tom Fitzpatrick (fitz@co-design.com)
Date: Mon Feb 25 2002 - 10:30:40 PST


Verilog++ 17th Committee Meeting
February 25th, 2002

Vassilios leading. TomF taking minutes. Action Items highlighted.

Next Meeting:
7:30am PST (tentative, depending on SNUG)
Mentor Graphics (location to be mailed out)
Thursday, 3/14/02

(aaaaaa-aaaaaaaaaa) Vassilios Gerousis *
(araaa-aaarar-aaaa) Dave Kelf*
(-------aaa--aaaa=) John Sanguinetti
(aaaaaaaa--a-aa---) Dennis Brophy *
(-aaaaaaaaaaaaaaaa) Stu Sutherland *
(--a--------aaaaa=) David Knapp
(a--aaaaaraaar-aaa) Tom Fitzpatrick*
(-a-arraa-aaaaaaa=) Phil Moorby
(aaa-aaaa-aaaaaaaa) Anders Nordstrom *
(aaaaaa--a-aaaaaa=) Cliff Cummings *
(aaaaaaraaa-aaaaaa) Simon Davidmann *
(aaaaaaaaaaaaa====) Peter Flake *
(--aaaa-aaaaa-aaaa) Stefen Boyd *
(aaaaaaaaaaaaaaaaa) David Smith *
(aaa-aaa--a-a--aa=) Mike McNamara *
(aaaaaaaaaa=======) Kevin Cameron *
(aaa-a-aa-a=======) Andy Tsay *
(aa-aa============) Alec Stanculescu*
(---a=============) Adam Krolnik
(aaa==============) Paul Graham *
(--a==============) David Seifert

Stu is still working on Draft4. Should be available by tomorrow.
Vasilios proposed distributing Draft4 at HDLCon to participants of the
SystemVerilog session. Feedback required to Stu by 3/5 to approve
distribution of the Spec.

Issue: Completion of Interface Section
Owner: Dave Kelf / Tom Fitzpatrick
Action: Cliff has distributed an email with Interface (section 13) examples
that have successfully compiled in SYSTEMSIM.
Analysis: Modifications approved by Co-Design

Issue: FSM
Name: Remove FSM construct
Owner: Cliff
Action: Cliff to consolidate his FSM emails into one proposal. Opposing
proposals shall also be distributed.
Analysis: Co-Design (no response yet)
Status: Open

Issue: Hierarchical/multi-clock FSM
Name: Enhance FSM syntax
Owner: Alec/Cliff
Action: Alec to distribute examples to justify the enhancement
        David to send SL2000 Tutorial, which has hierarchical fsm examples
Note: If the FSM construct is added, then Alec believes that these
capabilities should be included.

Issue: Implicit FSM design
Name: goto
Owner: Cliff/David Knapp

Issue: Implicit port connections
Name: .*/.name
Owner: Cliff
Action: Cliff to distribute email and Peter to distribute additional
discussion. Cliff to formalize proposals for these items.
Discussion:
- .* and .name should be mutually exclusive
- If the sub-module has a port that does not match a signal in the parent,
is it an error? Yes.

Issue: Deprecation Items
Owner: Cliff
Action: Cliff to distribute list of items
Status: Open

Issue: $root
Owner: Stefan Boyd
Action: $root will be dropped from the issue list if Stefan does not issue a
proposal by the next meeting.
Status: Open

Issue: Inheritance
Owner: David Smith
Action: This issue is removed from the issue list for this version.
Status: Closed

Issue: Packed/Unpacked Arrays
Owner: Paul Graham
Action: Paul to distribute a more formal proposal.
Status: Added to Issues list

+----------------------------+------------------------------------------+
| Tom Fitzpatrick | Tel: 1 978 448 8797 |
| Technical Product Manager | Mobile: 1 978 337 7641 |
| Co-Design Automation, Inc. | email: fitz@co-design.com |
+----------------------------+------------------------------------------+
| Web: www.co-design.com | Latest News: |
| www.superlog.org | http://www.co-design.com/news/index.htm |
+----------------------------+------------------------------------------+
| SUPERLOG = Faster, Smarter Verilog |
+-----------------------------------------------------------------------+



This archive was generated by hypermail 2b28 : Mon Feb 25 2002 - 10:29:41 PST