Actions from 19th Committee Meeting 3/18/02


Subject: Actions from 19th Committee Meeting 3/18/02
From: Peter Flake (flake@co-design.com)
Date: Tue Mar 19 2002 - 10:31:58 PST


Stu,

Here are the notes I had to re-send.

Peter.

2. Page 18

Date: Mon, 10 Dec 2001 16:06:52 +0000
To: Dave Kelf <davek@co-design.com>
From: Peter Flake <flake@co-design.com>
Subject: Re: Verilog++ 13th Committee Meeting - 11/26/01
Cc: vlog-pp@eda.org

Page 18 - Attribute syntax still required from PeterF. Peter is targeting
this week to complete this.
Action: Peter to complete Attribute Syntax.

Attributes in modports

<modport_port> ::= <attribute_instance> <modport_port>
| [<direction>] [<port_type>] <identifier>

                        | <identifier> '.' <identifier>
                        | <import_export> 'task' <named_task_proto>
                        | <import_export> 'function' <named_fn_proto>
| <import_export> <identifier> {',' <identifier>}


Note that the modport declaration itself can be preceded by an attribute instance like any other interface item.

6. Page 39

Page 40 - Issues related to scheduling semantics discussion. Compatibility
issues with Verilog2K1. Also issues getting this through IEEE 1364 committee.
Action: Peter Consider this further given the need to make this straight
forward for the IEEE1364 committee.

We can probably limit the requirement to ensuring that execution of a single statement (not a block) containing no user task or function call is uninterrupted.  This allows atomic test-and-set using assignment operators in an if statement.
Proposed new wording:

SystemVerilog creates a thread of execution for each initial or always block, for each parallel statement in a fork/join block and for each dynamic process.  Each continuous assignment may also be considered its own thread.  Execution of each thread may be interrupted between statements at a semicolon, but a single statement (not a block) containing no user task or function call is uninterrupted.  This allows atomic test-and-set using assignment operators in an if statement.

Page 48.  Simon provided this example using $root.

// file: root_funs.slg
// example of usage of root without modules and just functions

typedef int myint;

function void main ();
  myint i,j,k;
  $display ("entering main...");
  left (k);
  right (i,j,k);
  $display ("ending... i=%0d, j=%0d, k=%0d", i, j, k);
endfunction

function void left (output myint k);
  k = 34;
  $display ("entering left");
endfunction

function void right (output myint i, j, input myint k);
  $display ("entering right");
  i = k/2;
  j = k+i;
endfunction

main();


12. Page 53

There is one name space hierarchy in SUPERLOG ESS.   A type name may be not be the same as an instance name.
Types include modules, interfaces, and data types.  Instances include tasks, functions, procedures, variables, constants and labels as well as module and interface instances.

Pre-defined (built-in) names begin with $.  For example $root is the name of the activation script.

Names are initially global.  A new name space is defined by:
a module or interface
a task or function
a sequential or parallel block
a structure or union

Tasks and function definitions cannot be nested within themselves, but can be defined in modules or interfaces.  Again the declaration in the closest enclosing scope is matched.

A data type can be defined in the global scope, a module, interface, task or function, using a typedef, and this name cannot be used for anything else within the same scope.




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