Subject: Re: Thoughts on the .* proposal
From: Peter Flake (flake@co-design.com)
Date: Mon Mar 25 2002 - 03:17:29 PST
Stu,
I have taken the time to to review Cliff's proposal. My reason to defer
is because of implementation issues such as not being able to build the
port connection data structure until you have found the module
definition. I agree that .* is a useful feature.
Peter.
At 06:53 PM 3/23/02 -0800, Stuart Sutherland wrote:
>All,
>
>The e-mail votes to defer the .* port connection proposal to a later
>version of SystemVerilog leave me a little concerned that some of us have
>not taken time to carefully review Cliff's .* proposal. In Cliff's e-mail
>of 17 Mar 2002 (subject: ".* and .name Implicit Port Declaration Proposal
>- 20020317") he went to a great deal of effort to explain the syntax and
>benefits of the .* construct. The proposal is very thorough, and leaves
>nothing to "defer". A couple of minor questions were raised regarding the
>order of mixed .* and named connections, but those questions can be
>quickly answered, and do not justify deferring a useful construct for
>several months.
>
>A number of readers of this message have not voted at all. I would like
>to encourage those who have not yet voted, and those who perhaps voted to
>defer the construct because they did not have time to read Cliff's three
>attachments to the aforementioned e-mail, to find the time to review the
>proposal before the 9:00 AM conference call on the 25th. They document
>the syntax and advantages very clearly.
>
>Stu
>
>
>~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>Stuart Sutherland Sutherland HDL Inc.
>stuart@sutherland-hdl.com 22805 SW 92nd Place
>phone: 503-692-0898 Tualatin, OR 97062
>www.sutherland-hdl.com
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