RE: Thoughts about arrays in SystemVerilog

Subject: RE: Thoughts about arrays in SystemVerilog
From: Shalom.Bresticker@motorola.com
Date: Tue Mar 26 2002 - 22:04:26 PST

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I agree with Mac's diatribe.

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Shalom Bresticker                           Shalom.Bresticker@motorola.com
Principal Staff Engineer                               Tel: +972 9 9522268
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