Subject: Re: Proposed BNF Fix for Verilog-2001 Parameter Errata
From: Pat Bryant (pkbryant2@attbi.com)
Date: Thu Apr 11 2002 - 14:08:11 PDT
I'm concerned with the fact that the "parameter_declaration" line is the
only one
that has a semi-colon in the "non_port_module_item". How about
adding a new BNF construct called "parameter_declaration_item" with is
parameter_declaration_item ::=
{parameter_declaration ;}
Then in the module_item and non_port_module_item would be
non_module_item ::=
module_or_generate_item
{attribute_instance} generated_instantiation
| {attribute_instance} local_parameter_declaration
| {attribute_instance} module_or_generate_item
| {attribute_instance} parameter_declaration_item
| {attribute_instance} specify_block
| {attribute_instance} specparam_declaration
Maybe we can do something similar for "port_declaration ;" in the
"module_item".
I have no great concerns with what was proposed, but I find that if the
formats under a
BNF construct is all similar, then there is less chance of (human) error.
Pat Bryant
----- Original Message -----
From: Clifford E. Cummings <cliffc@sunburst-design.com>
To: <vlog-synth@server.eda.org>; <vlog-pp@server.eda.org>; <btf@boyd.com>
Sent: Thursday, April 11, 2002 12:13 PM
Subject: Proposed BNF Fix for Verilog-2001 Parameter Errata
> Hi, All -
>
> Proposed BNF Fix for Verilog-2001 Parameter Errata
>
> We (I) made a mistake in the Verilog-2001 BNF concerning the definition of
> the module_parameter_port_list and vendors are starting to implement these
> parameter port lists incorrectly. We need to fix this in the Verilog-2001
> Standard (issue an errata notice), but we also need to make sure that the
> errata does not propagate to the IEEE Verilog-Synthesis (1364.1) and
> SystemVerilog (Accellera) standards to compound the problem.
>
> Attached is a full description of the problem and a proposed fix.
>
> Please read and respond.
>
> Regards - Cliff Cummings
>
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