Subject: Teleconference Agenda
From: Vassilios.Gerousis@Infineon.Com
Date: Sun Apr 28 2002 - 22:22:20 PDT
Hi V++-ers,
We are coming now to a final stage. At HDLCON, we put a set of detailed milestones to prepare us for this meeting. We have also worked very hard in the last year to come to this point. This team has shown enthusiasm, devoted the necessary time and effort to achieve this milestone, and provided all of us with real teamwork environment. The team spirit is evident in this committee, and we all should be proud.
In order to proceed today, everyone should be reminded that the technical content has been worked on word by word, sentence by sentence, paragraph by paragraph and topic by topic. Our task is to do clean up. nothing more and nothing less. We have postponed many topics to 3.1 version. As such we must devote our time today and the rest of this month in the clean up phase.
Our goals for today are:
1- Vote on the document to go to the Accellera Board for standard approval. Only qualified voters are allowed to vote. Dave Kelf has that list.
2- Discuss 3.1 topics: We should add C (PLI) interface to this release before we transfer this to IEEE. We have technology offers in this area.
a- We will have a face to face meeting one week before DAC in San Jose. It will be devoted to 3.1 planning. A teleconference will be provided for people who cannot travel.
b- We should also plan on having a bird of a feather session at DAC to present the latest in 3.0. Stu, Cliff and Dave can you please help me to put this together.
The agenda for today:
1- Introduction of new members.
2- Review the document (Draft 7):
a- The new members can help us by reading and identify areas which should be clarified.
b- Wording mistakes, model error, typographical error, grammatical errors, etc.
3- Voting.
4- SystemVerilog 3.1 topics (if we have time).
5- Next conference call (next Monday) -- Targeted for LRM cleanup.
I have seen few email discussions on rehashing the same materials. However, we must focus on making sure that the document is clear, understandable, and have small number of errors as much as possible. This is definitely not an exciting task, but I would like to see every member to be proud of a good clean document.
Best Regards
Vassilios
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Dr. Vassilios Gerousis Infineon Technologies
DAT CAD, MchB
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email: Vassilios.Gerousis@infineon.com Germany
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