Portable Stimulus Webinar Series
Join us for a three-part webinar series on Portable Stimulus. Derived from the Accellera Portable Stimulus Tutorial presented at DVCon U.S. in February 2017, this webinar series provides an in-depth look at the upcoming Accellera Portable Test and Stimulus standard that will permit the creation of a reusable model for a variety of users across different levels of integration under different configurations.
Part 1: Monday, April 10 at 8:00am PT
This session will begin with a discussion of verification productivity, the reasons the Portable Stimulus Standard was undertaken and the goals of the standardization effort. It will also provide a detailed technical overview of many of the concepts and language constructs being used to enable portable scenario-level specification of stimulus and verification intent. Part 1 of the webinar is completed; this session is now available on demand.
Part 2: Monday, April 17 at 8:00am PT
This session will build on the previous discussion in Part 1 of concepts and constructs, showing how block-level stimulus and verification intent models can be reused and augmented to describe system-level scenarios. It will also discuss how a Portable Stimulus model may be used to generate a test implementation on multiple platforms. Part 2 of the webinar is completed; this session is now available on demand.
Part 3: Monday, April 24 at 8:00am PT
This session will discuss how to model coverage in PSS and how a hardware/software interface layer could be used to improve portability of stimulus models. It will close with a summary of standardization efforts and upcoming goals.
After each presentation, there will be a Q&A period where webinar presenters will answer questions from attendees.
SystemC 2.3.2 Public Review Now Open
The Accellera SystemC Language Working Group has released the proposed SystemC 2.3.2 for testing and feedback from the community.
This is a maintenance release with some new features including a foundation for C++11/14 enablement, a centralized global name registry enabling CCI naming requirements, new TLM socket and sc_signal base classes, and updated compiler and platform support including Windows DLL support and an experimental CMake build system. There are also many bug-fixes and general clean-up.
Licensed under Apache 2.0, the release package contains the SystemC class library and the regression test suite. It can be downloaded here.
April 19, 2017
Parkyard Hotel Shanghai
Registration open | Advance rates until April 7
Accellera Taiwan Forum for System Level Verification & Design
April 21, 2017
Find out more >
Event Dates Announced
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- February newsletter now available
- Article: DVCon India 2016: A Success in the Making
- Article: DVCon: Building a Community Through Quality Conferences
- Accellera Standards Technical Update video presentation
- System-Level Modeling for Today and Tomorrow with SystemC video presentation
- New Portable Stimulus Working Group
- IEEE 1800.2™ for UVM Approved as an IEEE Standard
April 11th, 2017
- Tom Alsop (of Intel) Named Accellera Systems Initiative 2017 Technical Excellence Award Recipient
February 22nd, 2017
- Accellera Day Opens DVCon U.S. on Monday, February 27 with Three Timely Tutorials
February 22nd, 2017