[sv-bc] Proposal for extern modules

Subject: [sv-bc] Proposal for extern modules
From: Karen Pieper (Karen.Pieper@synopsys.com)
Date: Fri Feb 14 2003 - 09:15:48 PST

Hi, all,

        One of the issues discussed in the $root task force was the ability to
support separate compilation in the context of .*. The attached proposal
adds extern module declarations to SystemVerilog to support the use of .*
during separate compilation.

        We are still working on other proposals to help support separate
compilation, so there will be more
to come.

Thanks,

Karen

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