[sv-bc] Agenda for the SystemVerilog Requirements Gathering Meeting

Hi, all,

The Agenda for the SystemVerilog Requirements Gathering Meeting can be found at:

http://www.eda.org/twiki/bin/view.cgi/P1800/P1800Agendas

I have uploaded all but one of the presentations (it was too big).

Presenters: Please note the presentation time you have been allotted. There is not any slack in the schedule, so we need to run the meeting on schedule. Be prepared to limit yourself to the time given.

See you there!

Karen

-- 
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.