Re: [sv-bc] RE: [sv-ec] Are variable-width part selects already part of the SV language? (Mantis 2684)

From: Greg Jaxon <Greg.Jaxon@synopsys.com>
Date: Fri May 07 2010 - 11:29:42 PDT

Bresticker, Shalom wrote:

A recent example was something like this:

We have a 128-bit input vector and a 128-bit replacement vector. N indicates the replacement point. That is, the output vector needs to be composed of bits [127:N] from the input vector and bits [N-1:0] of the replacement vector. 

The actual case was more complex, and I am not sure I am summarizing it correctly.

So, the intutitive but illegal way to code this is

out[127:0] = { in[127:N], replace[N-1:0] } ;

To actually get this, you can do something like (I'm not sure this is correct):

{(in >> N), replace << (127-N)} >> N
  

128'( { in>>N, replace<<(128-N) }>>N )

There are other ways to do this.
  

     128'(-1)<<N   & in
| ~( 128'(-1)<<N ) & replace



All are ugly, non-intuitive, hard to read, and even harder to write correctly.
  

Using selection vectors this way is natural enough, and also synthesizes to vector of MUXs driven by a triangular-decoder for N,
which I believe is optimal when N is an unknown.
If you could write 128'1 in place of 128'(-1), it might look simpler.
This sort of usage is also behind the Mantis 1156 suggestion for a vector version of ?:

The fact that there are ways to do this means that there are ways to transform the currently illegal form into a legal form.
  

It means there are "ways", but you're handwaving about the "means".  

Why shouldn't this transformation be automatic instead of forcing the designer to waste his time doing code contortions and usually requiring several passes until he gets it correct?
  

I agree with this intent, but [lo:hi] indexing is a coding style with a lot of collateral damage, as others have pointed out.
We can begin with its inability to describe an empty slice.  Why extend a notation already that flawed?
VHDL's unconstrained types deprive compilers of the powerful static analysis tools and require the Diophantine solvers for data dependence relations.   In synthesized sequential code, priority logic starts to build up wherever the compiler must be conservative about slice overlaps.

I also wish there was an algebra for synthesizing every definite function.  It should have dynamic data types and yet be compilable.
But its indexing operator will resemble APL more than VHDL.

Greg Jaxon

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