System/Verilog Basic Committee: [sv-bc] Agenda: May 24 SV-BC Mee

From: Maidment, Matthew R <matthew.r.maidment@intel.com>
Date: Mon May 17 2010 - 19:49:32 PDT

SV-BC Meeting
Date: Monday, May 24, 2010
Time: 9:00am-11:00am PDT

Toll Free Dial In Number in North America: 1-888-813-5316
Caller Paid Dial In Number: 1-650-584-6338
Meeting ID: 7839818

Agenda

+ Review IEEE patent policy
http://standards.ieee.org/board/pat/pat-slideset.ppt

+ Previous Meeting Minutes

Please review minutes from the past 2 meetings

http://www.eda.org/sv-bc/minutes/sv-bc_10_05_10.txt
http://www.eda.org/sv-bc/minutes/sv-bc_10_04_26.txt

+ Effort Estimates for Top-25

The Top-25 issues were reviewed by the 1800 WG.

http://www.eda.org/sv-bc/SV-BC_Scope_for_1800-2012.pdf

The next step they requested is a mapping of the Top-25 issues to a schedule.
More specifically they asked how many of the Top-25 issues can be completed
by October 2011. To respond we need to estimate the effort for each issue
and build a credible schedule for addressing as many issues as possible.

The 1800 WG would like a response by June 10, 2010.

Here is the list of Top-25 SV-BC issues:

1. 696
2. 2310
3. 3053
4. 3055
5. 2991
6. 1566
7. 2114
8. 210
9. 3056
10. 1084
11. 2115
12. 3073
13. 1697
14. 1202
15. 1251
16. 2289
17. 1504
18. 1144
19. 2081
20. 1553
21. 2684
22. 1861
23. 1523
24. 3074
25. 2124

1. Please come to the May 24th meeting prepared to discuss the effort
    required to resolve at least the Top-12.
2. If you want to suggest effort for any items in advance of May 24th,
    please send a mail to the reflector suggesting how much time, who
    from the SV-BC might be required to help with the initial proposal and
    some brief justification for your estimate.

This is begging for some document or Mantis fields/updates to help
manage this process. I will look into this in the coming days.

+ Future Agenda Items - Issue Resolution

The committees are authorized to resolve issues.
Shalom identified the following items ready for review:

Action Items

Outstanding
05/10/10 Matt create Master Issue for WG-approved SV-BC Top-25

Complete
  05/10/10 Matt include mapping of Top-25 to Feb meeting in WG presentation
  05/10/10 Cliff send Mantis numbers for remainder of n/a items
  05/10/10 Matt & Brad create presentation of Top-25 for 1800 WG
  05/10/10 Matt & Brad include mention of Analog in 1800 WG presentation.
  05/10/10 Gord create master mantis item for 3 $bits issues (Done: 3073)
  05/10/10 Matt track down mantis items for n/a 1, n/a 2, n/a 5
    (Done: n/a 1 = 2115, n/a 2 = 1956 & 2119, n/a 5 = 2124)
  04/26/10 Matt to create master port item for 2273 & 2593 (Done: 3056)
  04/26/10 Gord will create a master item for design topology issues.
           (Done: 3055)
  04/26/10 Brad to create master item called: "Clarifications for virtual
           interfaces and interface ports" (Done: 3053)
  04/26/10 Gord or anyone else provide URL or copy of interface paper if
           publicly available.
           (Done: See post http://www.eda.org/sv-bc/hm/10226.html)

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[sv-bc] Agenda: May 24 SV-BC Meeting