[sv-bc] Is Clocking block defines a scope

Hi,

I have a query for the following testcase.
This is a negative testcase, but I am not sure about what will be the
proper error message.
If clocking block defines a scope then the error message will be
"Invalid use of property p1" at line 11
But if clocking block doesn't define a scope then the error message
should be something like
"Redifinition of p1" at line 10.

Thanks
Kausik

     1 module const_range2 (output shortint out1, out2, input shortint
in1, in2, input clk1, clk2);
     2 parameter p1 = 30; //parameter p1
declared
     3 clocking cc1 @(posedge clk1 or negedge clk2);
     4 sequence s1;
     5 @(posedge clk1) (in1 + in2 > 5771);
     6 endsequence
     7 sequence s2;
     8 @(negedge clk2) ((out1 - out2) > 234);
     9 endsequence
    10 property p1; //property p1
declared
    11 (in1) s1[*p1:$] ##1 (in1 | in2) |-> s2; //p1 is used here
    12 endproperty
    13 endclocking
    14 endmodule
Received on Thu Aug 12 04:04:53 2004