Re: [sv-bc] meaning of .*

>If two modules instantiated with .* connections both have a port named
>DATA, but the top module has no such net are you saying that there is no
>implicit wire inferred to connect the two modules?

That would be correct.  An implicit net is only created for an
undeclared identifier appearing in a module port list.  If there is
no identifier in the list, there will be no implicit net.  Also note
that such implicit nets are always scalars, never vectors, so they
are not a general mechanism for connecting all ports anyway.

From an implementation viewpoint, these implicit nets are probably
inferred during parsing in most tools.  Information about instance
ports is not available at that point.

In the situation you describe, the requirement that .* connect all ports
that are not otherwise specified is an advantage.  You will get an error
for this unconnected port, rather than having it silently remain
unconnected.

Steven Sharp
sharp@cadence.com