[sv-bc] Facts & Dangerous Precedent Re: Config

This was bounced due to the subject.  Modified to appease the mail
server.

-----Original Message-----
Date: Sun, 24 Apr 2005 20:50:12 -0700
To: btf@boyd.com, etf@boyd.com, sv-bc@server.eda.org, 
sv-ec@server.eda.org
From: "Clifford E. Cummings" <cliffc@sunburst-design.com>
Subject: Config facts & Dangerous Precedent - was: potential command
  line option

Hi, All -

Another new subject line to separate out the issues.

Config facts:

*       I wrote the Verilog-2001 BNF - it was far better than the 
Verilog-1995 BNF but it still had errors.
*       In 1996 I helped champion the effort to put configurations on
the 
Verilog top-5
*       Tom Fitzpatrick and I championed the Verilog-1995 the config 
proposal for Verilog-2001
*       config, endconfig and library were intended to be 
Verilog keywords (see Draft-4 Annex B include in my email of 4/21/2005)
*       The config proposal was intended to make it possible 
to instantiate two modules with the same name but from different source
files without 
modifying the source files, which was required by the non-standard
`uselib 
directive . It also was intended to eliminate the need for the 
-v  -y  +libext+.v+ and many -f command line switches, not to 
substitute other switches in their place.
*       At least one tool has implemented configs according to the 
implementation that I envisioned when I helped propose configurations.

BNF facts:
*       I wrote the Verilog-2001 BNF and it had many errors.
*       We have not required vendors to implement error-BNF 
syntax once we have identified the errors.
*       There have been many places in the standard where the 
informative examples helped to identify errors in the normative BNF.
When we find 
discrepancies, we as a committee discuss the differences and decide what

needs to be changed. In some cases, it is the BNF that needs to be
changed.
*       Although we should make every effort to make the BNF 
perfect, the BNF is not perfect and the BNF-alone should not constitute
the 
final word regarding correct Verilog syntax

Config future
*       We should clarify whatever we think is the right thing 
to do with configs. This is a group decision.

Dangerous Precedent
*       I guess the follow-on question is, do we really want to set a 
precedent that might allow a vendor to implement a SystemVerilog feature

and then have other companies come back a few years later and request a 
significant change to the feature to make it easier to implement on
another
tool? Because, as you all have seen, I have a long memory for this type
of 
stuff
;-)   ;-)

Regards - Cliff

----------------------------------------------------
Cliff Cummings - Sunburst Design, Inc.
14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005
Phone: 503-641-8446 / FAX: 503-641-8486
cliffc@sunburst-design.com / www.sunburst-design.com
Expert Verilog, SystemVerilog, Synthesis and Verification Training