>It is currently illegal to declare a packed >array of predefined integer types: > > integer [3:0] x; > >This is because it was legal in verilog-1995 (or maybe just >in some simulators) to attach a range to an integer >declaration, in much the same way that a range could be >attached to a parameter declaration. Both of these are illegal in Verilog-1995. Verilog-XL allowed them, but ignored the ranges. > This range would not >create an array of integers, but instead specify a different >width for the single integer. That was probably the user's expectation when they put in the range, but in fact it had no such effect. >Or if you don't like that, how about this: > > There is one exception to the rules for packed array > syntax. A variable declaration whose data type is the > predefined type "integer" followed by a single > dimensional range is an error. This would be the more appropriate one. The other would be inconsistent, and does not even match the behavior of the non-standard syntax in Verilog-XL. Steven Sharp sharp@cadence.comReceived on Mon Apr 25 10:48:00 2005
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