Re: [sv-bc] Keywords

Kev has an interesting idea here.

At 10:05 AM 4/26/2005, Kevin Cameron wrote:
>>Turns out, the biggest offender is the keyword "config," which is the one 
>>we need to descend into the next level of keywords. Cadence implemented 
>>most of Verilog-2001 and then got around to implementing configs. Now 
>>they have the problem of customers using all types of Verilog-2001 
>>capabilities, but some of the Verilog-2001 code uses "config" as an 
>>identifier, so it is not as easy as telling the tool that this block of 
>>code is Verilog-1995, as I suggested in an earlier email message.
>
> From previous e-mails it looks to me like "config" is a top-level block 
> (don't have an LRM handy), in which case there is no reason to recognise 
> "config" as a keyword in a module.
>...

>I think limiting the scope of keywords would make life much easier for the 
>committees and the users. It would be fairly simple to say that a BNF 
>keyword is only recognized as a keyword in its own syntactic hierarchy 
>(i.e. no change to the BNF is actually required).
>
>Kev.

This is a really good point if people don't mind context-sensitive 
keywords. Seems like once you find "config" you are in one set of keywords 
until you find "endconfig." And once you are inside of "module" you have 
another set of keywords, and config could be a non-keyword in this context, 
until "endmodule."

I could go for this option if the vendors agree. It would give "config" 
back to modules and still allow config-files to be read in the Verilog 
input stream.

May be a little ugly for tool implementers (??) but this is interesting.

Thoughts, everyone?

Regards - Cliff

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Cliff Cummings - Sunburst Design, Inc.
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