Cliff's vote. At 02:11 PM 5/10/2005, you wrote: > http://www.eda.org/svdb/bug_view_page.php?bug_id=510 > > Approve:_______X_________ > Disapprove:______________ Reason:_____________________________ > Abstain:_________________ Reason:_____________________________ Also approve with Dave's friendly amendment. Another friendly amendment. Show both concatenation and replication operators in the table, just like in table 8-2 ADD: { } {{ }} (replication operator was missing) > http://www.eda.org/svdb/bug_view_page.php?bug_id=728 > > Approve:______X__________ > Disapprove:______________ Reason:_____________________________ > Abstain:_________________ Reason:_____________________________ > > >Thanks for all of your hard work! > >-- Brad ---------------------------------------------------- Cliff Cummings - Sunburst Design, Inc. 14314 SW Allen Blvd., PMB 501, Beaverton, OR 97005 Phone: 503-641-8446 / FAX: 503-641-8486 cliffc@sunburst-design.com / www.sunburst-design.com Expert Verilog, SystemVerilog, Synthesis and Verification TrainingReceived on Tue May 10 16:16:24 2005
This archive was generated by hypermail 2.1.8 : Tue May 10 2005 - 16:16:33 PDT