In my opinion, '1 is always unsigned. V2K already provides a signed literal representing all ones, namely, 1'sb1. For example, the following would display |11111111|00011111|11111111| module m (output [7:0] o1, o2, o3); assign o1 = 1'sb1 >>> 3; assign o2 = 1'sb1 >> 3; assign o3 = 1'sb1; initial #100 $display("|%b|%b|%b|", o1, o2, o3); endmodule The LRM should say The value is treated as unsigned. In a self-determined context these literals have a width of 1 bit. In my opinion, the answer to the question of the subject header is 'yes'. -- BradReceived on Mon Jun 13 10:13:29 2005
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